In order to produce a conductive connection between a bonding island or an I/O pad on a semiconductor chip and an external conductor structure, it is known to provide soldering islands on the chip. The external conductor structure is then soldered onto the soldering island by means of a solder.
The soldering island is arranged in elevated fashion on the surface of the semiconductor chip on the topside of an elevation element and comprises readily solderable non-oxidizing metal, in particular comprising gold. For its part, the soldering island is electrically conductively connected to the bonding island or the I/O pad via an interconnect which lies below the soldering island and runs right over the bonding island or the I/O pad.
The interconnect comprises a bottommost conductive layer, in particular comprising copper, and a conductive first passivation layer deposited thereon, in particular comprising nickel. The soldering island is then arranged on the first passivation layer. The basis of the elevation is formed by an elevation element below the soldering island. The first passivation layer serves, on the one hand, to prevent oxidation on the topside of the conductive layer. On the other hand, the first passivation layer serves as a solder stop which prevents a flowing-away of the solder on the topside of the interconnect from the level of the soldering island downwards.
This conductive connection is produced by firstly depositing a nucleation layer on the entire surface of the semiconductor wafer, which nucleation layer, in subsequent process steps, serves as an electrode for the electrolytic deposition of the metal layers of the interconnect and the soldering island. A first resist mask that frees the later structure of the interconnect is subsequently produced. The nucleation layer is thus uncovered in the region of the interconnect to be produced. A layer sequence comprising the conductive layer, the first passivation layer and an upper layer made of the material of the later soldering island is subsequently deposited by application of a corresponding voltage.
With the first resist mask being retained, the region of the later soldering island is then covered with a second resist mask. The upper layer is now uncovered in the region between the later soldering island and the bonding island or the I/O pad. The upper layer is subsequently removed in this region. Finally, the first and second resist masks and the nucleation layer are removed.
In the case of this method, the conductive layer is covered with the first passivation layer on its topside. The soldering island covers the first passivation layer on the surface thereof. The vertical side areas of the individual layers are uncovered.
In the case of this prior art, it is disadvantageous, on the one hand, that, during the soldering operation, the solder can pass over the side area of the first passivation layer as far as the side area of the conductive layer and be conducted downwards at the side area of the conductive layer. This reduces the quantity of solder at the soldering location, which leads to a reduction of the reliability of the soldering locations. On the other hand, it is disadvantageous that the side areas of the conductive layer can oxidize or corrode, which likewise leads to a reduction of the reliability.